Device and Integrated System Design, Fabrication, and Characterization
This facility provides capabilities for all basic research fabrication, processing and wafer/die preparation, and packaging. Opened in August 2005, the Provost’s Office, College of Engineering and the Lane Department of CSEE funded the establishment of this 3300 sq. ft. clean room facility due to its central importance in advancing integrated device and systems research. The facility has been equipped using major research instrumentation grants and donations by AT&T, IBM, and Union Carbide/KTI Chemicals. The lab is used by faculty and students campus-wide and continues to be a magnet and resource for interdisciplinary work, supporting collaborative research proposals among the departments of electrical engineering physics, chemistry, chemical engineering, and the health sciences.
The facility’s clean room environment controls particulate contamination, temperature, and humidity. The suite of four rooms consists of Class 100 photolithography area, Class 1,000 wet processing area, Class 10,000 dry processing area, and a Class 10,000 packaging and characterization area. All of the lab services, including 18 megaohm DI water, nitrogen, compressed air and vacuum, as well as lab space were designed for expansion for new equipment installations.
Facility Equipment Resources
Facility Usage Training
For more information about the Nanosystems Engineering Shared Cleanroom Facility, please contact:
Kolin S. Brown, Ph.D.
Research Program Coordinator
WVNano Shared Resources Group
(304) 293-0405 ext. 2533